in the exercise, we examine in detail how an instruction is executed in single-cycle datapath. problems in this exercise refer to a clock cycle in which the processor fetches the following instruction word: 0xadac0014. for context: the encoded instruction is sw $t4, 20($t5) (a) what are the values of the alu control unit's inputs for this instruction? (b) what is the new pc address after this instruction is executed? highlight the path through which this value is determined. (c) for each mux, show the values of its inputs and outputs during the execution of this instruction. list values that are register outputs at reg [xn] (d) what are the input values for the alu and the two add units? (e) what are the values of all inputs for the registers unit?

Datapaths with a Single Cycle: Single Datapaths is identical to the first single-cycle datapath The information memory has just a single Location input.

The MemRead and MemWrite control signals can be used to determine the actual memory operation. Data and instructions are stored in their own separate memories.

What is execution with a single cycle?

Each instruction is carried out by a CPU with a single cycle. To put it another way, each instruction can only be carried out in one cycle. To put it another way, our cpi is 1. There needs to be a set amount of time for each cycle.

How does ALUOp get its value?

The "func" field of the instruction determines the ALUOp. lw $t0, –4($sp) is an illustration of a load instruction. For the effective address to be calculated, the ALUOp must be 010 (add). Sw $a0, 16($sp) is an illustration of a store instruction.

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